REGS_ERR_RESP=Val_0x0, SPI_ERR_RESP=Val_0x0
AES Interrupt Mask Register
REGS_ERR_RESP | Mask for the Register Error Response interrupt. 0 (Val_0x0): Register Error Response interrupt is not masked. 1 (Val_0x1): Register Error Response interrupt is masked. |
SPI_ERR_RESP | Mask for the SPI Error Response interrupt. 0 (Val_0x0): SPI Error Response interrupt is not masked. 1 (Val_0x1): SPI Error Response interrupt is masked. |